Supports one 10BASE-T port with automatic polarity detection and correction
Supports Full and Half-Duplex modes
Programmable automatic retransmit on collision
Programmable padding and CRC generation
Programmable automatic rejection of erroneous packets
SPI¢â Interface with speeds up to 10 Mb/s
Buffer
8-Kbyte transmit/receive packet dual port SRAM
Configurable transmit/receive buffer size
Hardware-managed circular receive FIFO
Byte-wide random and sequential access with auto-increment
Internal DMA for fast data movement
Hardware assisted IP checksum calculation
Medium Access Controller (MAC) Features
Supports Unicast, Multicast and Broadcast packets
Programmable receive packet filtering and wake-up host on logical AND or OR of the following: - Unicast destination address - Multicast address - Broadcast address - Magic Packet¢â - Group destination addresses as defined by 64-bit hash table - Programmable pattern matching of up to 64 bytes at user-defined offset
Loopback mode
Physical Layer (PHY) Features
Wave shaping output filter
Loopback mode
Operational
Two programmable LED outputs for LINK, TX, RX, collision and full/half-duplex status
Seven interrupt sources with two interrupt pins
25MHz clock
Clock out pin with programmable prescaler
Operating voltage range of 3.14V to 3.45V
TTL level inputs
Temperature range: -40¡ÆC to +85¡ÆC Industrial, 0¡ÆC to +70¡ÆC Commercial (SSOP only)